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Espressif Systems /ESP32-P4 /LP_ADC /MEAS2_CTRL1

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Interpret as MEAS2_CTRL1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SAR2_CNTL_STATE 0 (SAR2_PWDET_CAL_EN)SAR2_PWDET_CAL_EN 0 (SAR2_PKDET_CAL_EN)SAR2_PKDET_CAL_EN 0 (SAR2_EN_TEST)SAR2_EN_TEST 0SAR2_RSTB_FORCE 0SAR2_STANDBY_WAIT0SAR2_RSTB_WAIT0SAR2_XPD_WAIT

Description

ADC2 configuration registers.

Fields

SAR2_CNTL_STATE

saradc2_cntl_fsm.
SAR2_PWDET_CAL_EN

RTC control pwdet enable.
SAR2_PKDET_CAL_EN

RTC control pkdet enable.
SAR2_EN_TEST

SAR2_EN_TEST.
SAR2_RSTB_FORCE

N/A
SAR2_STANDBY_WAIT

N/A
SAR2_RSTB_WAIT

N/A
SAR2_XPD_WAIT

N/A

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data